Design and Implementation of an Efficient Reversible Comparator

PDF) Design of Efficient Reversible Binary Comparator

Energy comparison of sequential and integrated CO2 capture and electrochemical conversion

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A 0.5-V, 1.2-GS/s, 6-Bit Flash ADC Using Temporarily-Boosted Comparator

Quantum Dot Cellular Automata-Based Design of 4 × 4 TKG Gate and Multiplier with Energy Dissipation Analysis

Efficient designs of reversible sequential circuits

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Design of Reversible Gate-Based Fingerprint Authentication System in Quantum-Dot Cellular Automata for Secure Nanocomputing

Architecture diagram for reversible comparator using half subtraction